1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and a process for production thereof. More particularly, the present invention relates to a technology to be applied to a semiconductor integrated circuit having DRAM (Dynamic Random Access Memory).
2. Description of the Background
DRAM is composed of memory cells, each consisting of a memory cell transistor and a storage capacitor connected thereto, which are arranged in an array on a semiconductor substrate. For DRAM to have a high capacity, the memory cell should have a high capacitance per unit area.
One way to meet this requirement is to make the dielectric film of the capacitor from tantalum pentoxide having a high dielectric constant, as disclosed in Japanese Patent Laid-open No. 244364/1994. The feature of this disclosure is that the polysilicon electrode is coated with silicon nitride film by thermal nitriding with ammonia so that the polysilicon electrode is not oxidized when the tantalum pentoxide film undergoes heat treatment with oxygen.
A similar technology is disclosed in Japanese Patent Laid-open No. 26712/1999, according to which the capacitor is constructed of polysilicon electrodes (which have semispherical silicon crystals formed on the surface thereof) and tantalum pentoxide film by thermal nitriding. This technology is effective in increasing capacitance per unit area owing to the high dielectric constant of tantalum pentoxide and the increase in the effective electrode surface area achieved by the semispherical silicon crystals.
Additionally, Japanese Patent Laid-open No. 223366/1992 discloses another method of forming silicon nitride film on the surface of polysilicon by plasma nitriding.
The present invention may be applicable to the process of forming DRAM capacitors to be used for high-capacity semiconductor circuits such as 256 Mbit DRAMs. The process for production of such large-capacity DRAMs proceeds in a way in which the transistors for sense amplifier are already formed when the capacitor step starts. Therefore, these transistors may deteriorate, causing irregular operation, if the capacitor step is carried out at, say, 900xc2x0 C. Previous attempts to address this problem by carrying out nitriding at 800xc2x0 C. failed because the silicon nitride film is oxidized while tantalum pentoxide undergoes heat treatment for crystallization (at 750xc2x0 C. in oxygen), with the result that the capacitor decreases in capacitance.
The crystallization of tantalum pentoxide needs heating at 700xc2x0 C. and preferably at a temperature of 750xc2x0 C. or above. Crystallization should cause tantalum pentoxide to change from an amorphous structure (having a dielectric constant of 25) into a xcex4-phase crystalline structure (having a dielectric constant of 60); however, according to the conventional technology, crystallization takes place almost simultaneously with the oxidation of the silicon nitride film. Therefore, the effect of increasing the capacitance per unit area by increasing the dielectric constant is cancelled by a decrease in capacitance due to oxidation of the silicon nitride film. Thus the conventional technology has heretofore not made effective use of the high dielectric constant of tantalum pentoxide.
The process of forming semispherical silicon crystals on the surface of a polysilicon electrode is usually followed by an additional step of doping the surface of the silicon crystals with phosphorus, thereby decreasing the voltage dependence of the capacitance of the capacitor. Plasma nitriding at 800xc2x0 C. caused the doped phosphorus to vaporize again, with the result that the voltage dependence of capacitance increased, and the capacitance of the capacitor substantially decreased.
It is an object of the present invention to produce semiconductor integrated circuits at a relatively low temperature and produce capacitors having a sufficiently large capacitance per unit area, for example, for high capacity DRAMs.